PIC16F639-E/SS【PDF 27/74 页】IC MCU FLASH 2KX14 20SSOP

收藏本站

您好，
买卖IC网欢迎您。
请登录
免费注册

买卖IC网

Sheet目录3876

23页 24页 25页 26页 [27页]28页 29页 30页 31页

Micrel, Inc.

KSZ8841-PMQL

October 2007

M9999-100407-1.5

Bit

Default

Description

Provides interrupt line routing information. The basic input/output system

(BIOS) writes the routing information into to this field when it initialized and

configures the system. The value in this field indicates which input of the

system interrupt controller is connected to the K8841P’s interrupt pin. The

driver can use this information to determine priority and vector information.

Values in this field are system architecture specific.

The following table shows the access rules of the register.

Category

Description

Value after hardware reset

0x281401XX

Capabilities ID Register (CCID Offset 50H)

The CCID register is a read-only register that provides information on the KSZ8841-PMQL power management

capabilities. The following table shows the CCID register bit fields. The CCID register bits [31-16] are mirrored with

PMCR register bits [15-0].

Bit

Default

Description

PME Support D3 (cold)

If this bit is set, the KSZ8841-PMQL asserts PME in D3(cold) power state.

Otherwise,

the KSZ8841-PMQL does not assert PME in D3(cold).

The value of this bit is loaded from the PME_D3_cold bit in the EEPROM.

PME Support D3 (hot)

The value of this bit is 1, indicating that the KSZ8841-PMQL may assert

PME in

D3(hot) power state.

PME Support D2

If this bit is set, the KSZ8841-PMQL asserts PME in D2 power state.

Otherwise, the

KSZ8841-PMQL does not assert PME in D2 state.

The value of this bit is loaded from the PME_D2 bit in the EEPROM.

PME Support D1

If this bit is set, the KSZ8841-PMQL asserts PME in D1 power state.

Otherwise, the

KSZ8841-PMQL does not assert PME in D1 state.

The value of this bit loaded from the PME_D1 bit in the EEPROM.

PME Support D0

The value of this bit is 0, indicating that the KSZ8841-PMQL does not

assert PME in

D0 power state.

D2 Support

If this bit is set, it indicates that the KSZ8841-PMQL support D2 power

state.

The value of this bit is loaded from the D2_SUP bit in the EEPROM.

1 References to D0, D1, D2, and D3 are power management states defined in a similar fashion to the way they are defined for PCI.

For more information, refer to the PCI specification at www.pcisig.com/specifications/conventional/pcipm1.2.pdf.

发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

*型号	*数量	厂商	批号	封装

添加更多采购

采购需求

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

我的联系方式